The present invention relates to a circuit for measuring current through a memory cell in a NAND flash memory. More particularly, the present invention relates to a circuit for effectively measuring the total current flowing through bit lines in a NAND flash memory.
A NAND flash memory is a semiconductor memory device which electrically programs and erases a memory cell, and does not require a refresh function when periodically rewriting data. A NAND flash memory device includes a page buffer for temporarily storing mass storage information or for reading the stored information.
The page buffer receives mass storage data from an input/output pad, and then provides the received data to memory cells. In addition, the page buffer stores data from the memory cells, and then outputs the stored data.
Hereinafter, a conventional circuit for measuring current through a memory cell during manufacture or testing of a NAND flash memory device will be described.
FIG. 1 is a block diagram illustrating a conventional circuit for measuring current in a NAND flash memory device. The NAND flash memory device includes a memory cell array (not shown), a page buffer section 10, a column decoder section 20, a multiplexer 30, a bypass section 40 and an IO pad section 50. The page buffer section 10 has first to eighth page buffers for programming data, and verifying and reading the memory cell array. The column decoder section 20 includes first to eighth column decoders. The multiplexer 30 selects one of data lines DMADATA (Direct Memory Data) <0:7> that is connected to an output terminal of the column decoder section 20.
The page buffer section 10 senses and latches bit lines BLo or BLe when programming data in the memory cell array or reading data from the memory cell. The column decoder section 20 selects a specific bit line.
The multiplexer 30 outputs only one signal (DMAOUT) from the data lines DMADATA<0:7> that are output from the first to eighth column decoders of the column decoder section 20. The signal is output from the multiplexer 30 in accordance with selecting signals TMDMA<0:2>. to minimize the number of lines required to measure current through the memory cell.
The bypass section 40 provides the signal DMAOUT output from the multiplexer 30 to the IO pad section 50 during a current measuring test mode. The bypass section 40 prevents the passage of the signal DMAOUT to the IO pad section 50 during other modes.
The IO pad section 50 is physically connected to a channel of a measurement apparatus. Thus, the measurement apparatus may directly measure current through the memory cell.
In the circuit for measuring current, the multiplexer 30 selects one of the data lines DMADATA<0:7> connected to the page buffer section 10 and the column decoder section 20. The multiplexer 30 outputs the current through the selected data line. Then, the measurement apparatus measures the current output from the multiplexer 30 and flowing through the IO pad section 50.
FIG. 2 illustrates detailed circuitry of the multiplexer in FIG. 1. The multiplexer 30 includes a decoder 31 and a digital multiplexer 32.
The decoder 31 decodes test mode signals TMDMA<0:2> when measuring the current. The decoder 31 then generates selecting signals D<0:7> for selecting one of the signals of the eight data lines DMADATA<0:7>.
The digital multiplexer 32 outputs current of the corresponding data line through its output line in accordance with a decoding value of a test mode signal.
The circuit in FIG. 2 measures the current through only one data line corresponding to a mode value of test mode signals TMDMA<0:2> of the multiplexer 30 in a measuring current mode. Hence, to measure a sum of currents passing through the memory cells, the circuit measures each current by sequentially changing mode values of the test mode signals TMDMA<0:2>, and then calculating the sum of the measured currents.
The above circuit for measuring the current by sequentially measuring the current through each data line and then calculating the sum of the currents is time inefficient. Additionally, current measurement error values of the measurement apparatus may be continuously omitted when calculating the sum of the currents.